Junction field effect transistors comprise a source and a drain which are connected together by way of a first doped region of semiconductor. Current flow in the junction field effect transistor is provided by a gate formed by a second doped region of semiconductor within the first doped region. For convenience the space between the drain and source is often referred to as a channel, but this terminology can be imprecise. Herein the following terminology will be used:                1) The portion of the first doped region between the gate and the back gate will be called the first channel region.        2) The portion of the first doped region between the gate and the drain will be called the second channel region.        3) The portion of the first doped region between the gate and the source will be called the third channel region.        
The first doped region and the second doped regions are oppositely doped, thus a P doped gate may be formed in a N-type channel.
Within the device, the “current flow” occurs as a result of movement of the majority carriers. The majority carriers are electrons in an N-type semiconductor and are holes in a P-type semiconductor. The term current flow path relates to the movement of the majority carriers to create a current flow through the transistor. Junction field effect transistors do not have an insulating region between the gate and the channel. This means that a gate current may flow when the device is passing a current between its drain and source. It is desirable for the gate current to have a low value.